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Title: The Design, Fabrication and Characterization of Independent-Gate FinFETs
Authors: Fried, David
Keywords: FinFET
Threshold Voltage Control
Issue Date: 29-Apr-2004
Abstract: The Independent-Gate FinFET is introduced as a novel device structure that combines several innovative aspects of the FinFET and planar double-gate FETs. The IG-FinFET addresses the concerns of scaled CMOS at extremely short channel lengths, by offering the superior short channel control of the double-gate architecture. The IG-FinFET allows for the unique behavioral characteristics of an independent-gate, four-terminal FET. This capability has been demonstrated in planar double-gate architectures, but is intrinsically prohibited by nominal FinFET integration schemes. Finally, the IG-FinFET allows for conventional CMOS manufacturing techniques to be used by leveraging many of the FinFET integration concepts. By introducing relatively few deviations from a standard FinFET fabrication process, the IG-FinFET integration offers the capability of combining three-terminal FinFET devices with four-terminal IG-FinFET devices in one powerful technology for SoC or Analog/RF application, to name only a few. The IG-FinFET device is examined by device modeling, circuit simulation, testsite design, fabrication and electrical characterization. The results of two-dimensional device simulations are presented, and the effects of process variations are discussed in order to understand the desire for a fully self-aligned double-gate architecture. Circuit design is investigated to demonstrate the capabilities of such a double-gate device. Physical designs are also examined, and the layout penalties of implementing such a device are discussed in order to understand the requirement of double-gate and independent-gate integration. A test vehicle is designed and presented for the structural integration and fabrication process development necessary for the demonstration and validation of this novel device architecture. The processing and results of several fabrication experiments are presented, with physical and electrical analysis. The integration changes and process modifications suggested by this analysis are discussed and analyzed. Fabricated devices are then electrically and physically characterized. The final set of fabricated devices show excellent agreement with simulated devices, and experimental verification of double-gate device theory. The results of this work provide for a new and novel device architecture with wide ranging technology application, as well as a new fabrication platform with which to study double-gate device theory and further technology integration.
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