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Please use this identifier to cite or link to this item: http://hdl.handle.net/1813/155
Title: Synthesis of Translinear Analog Signal Processing Systems
Authors: McDonald, Eric John
Keywords: analog circuit design
translinear
circuit sythesis
MITE
multiple-input translinear element
analog signal processing
Issue Date: 23-Jul-2004
Abstract: Even in the predominantly digital world of today, analog circuits maintain a significant and necessary role in the way electronic signals are generated and processed. A straightforward method for synthesizing analog circuits would greatly improve the way that analog circuits are currently designed. In this dissertation, I build upon a synthesis methodology for translinear circuits originally introduced by Bradley Minch that uses multiple-input translinear elements (MITEs) as its fundamental building block. Introducing a graphical representation for the way that MITEs are connected, the designer can get a feel for how the equations relate to the physical circuit structure and allows for a visual method for reducing the number of transistors in the final circuit. Having refined some of the synthesis steps, I illustrate the methodology with many examples of static and dynamic MITE networks. For static MITE networks, I present a squaring reciprocal circuit and two versions of a vector magnitude circuit. A first-order log-domain filter and an RMS-to-DC converter are synthesized showing two first-order systems, both linear and non-linear. Higher order systems are illustrated with the synthesis of a second-order log-domain filter and a quadrature oscillator. The resulting circuits from several of these examples are combined to form a phase-locked loop (PLL). I present simulated and experimental results from many of these examples. Additionally, I present information related to the process of programming the floating-gate charge for the MITEs through the use of Fowler-Nordheim tunneling and hot-electron injection. I also include code for a Perl program that determines the optimum connections to minimize the total number of MITEs for a given circuit.
URI: http://hdl.handle.net/1813/155
Appears in Collections:Theses and Dissertations (OPEN)

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