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Please use this identifier to cite or link to this item: http://hdl.handle.net/1813/5550
Title: Fast Compiled Logic Simulation Using Linear BDDs
Authors: Gupta, Sudeep
Pingali, Keshav
Keywords: theory center
Issue Date: Jun-1995
Publisher: Cornell University
Citation: http://techreports.library.cornell.edu:8081/Dienst/UI/1.0/Display/cul.tc/95-214
Abstract: This paper presents a new technique for compiled zero delay logic simulation, and includes extensive experiments that demonstrate its performance on standard benchmarks. Our compiler partitions the circuit into fanout-freeregions (FFRs), transforms each FFR into a linear sized BDD, and converts each BDD into executable code. In our approach, the computation is sublinear in the number of variables within each partition because only one path, from root to leaf, of the BDD is executed; therefore in many cases, substantial computation is avoided. In this way, our approach gets dome to the advantages of oblivious as well as demand-driven evaluation. We investigated the impact of the various heuristics on performance, and based on this data, we recommend good values for design parameters. A performance improvement of up to 67% over oblivious simulation is observed for our benchmarks.
URI: http://hdl.handle.net/1813/5550
Appears in Collections:Cornell Theory Center Technical Reports

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